I want to determine engineer sampling by CPUID instruction.

[kouhei_nanahara]

How do I use the CPUID instruction to determine engineer sampling (ES)?
thanks.

[The Coolest]

It depends on the CPU model, but I don't think that it's possible do to via CPUID in the processors from the last decade or more.

[kouhei_nanahara]

Thank you for reply. So how do you determine engineer sampling (ES) on a C++ program?
Thanks.

[The Coolest]

Again, it depends on the CPU. And I'll have to look at the code, but it's a combination of different things, including CPUID, some MSRs and some other data.

[kouhei_nanahara]

Thanks for the reply.
How do I determine the CPU i3-3240 (ES) engineer sampling I have? Can you tell me how CPUID or RDMSR, and how do I write the code?
sorry, my bad english.
Thanks.

[The Coolest]

I wouldn't recommend messing with MSRs if you don't even know how to put that in code.
To read a MSR you need a kernel mode driver, that's the basics. If you don't have one, you won't be able to do it.
MSRs are 64 bit registers, they have a lower half and upper half. After RDMSR is performed, bits 0 - 31 are stored in EAX and bits 32 - 63 are stored in EDX.
In Ivybridge, if bit 27 is set, the CPU is an engineering sample.

[kouhei_nanahara]

Thanks so much for the reply!
Finally, to determine engineer sampling, what definition should I use in starting with #define IA32_ for RDMSR? I would appreciate if you could tell me the bit position that is set in other CPUs such as Sandy Bridge.
PS: The kernel driver I'm using is WinRing0.
Thanks.

[The Coolest]

Oops, sorry about that. You need MSR_PLATFORM_INFO (MSR 0xCE)

[kouhei_nanahara]

if (RDMSR (0xce, & eax, & edx)) {
if (EAX & (1 < 27)! = 0) {
Processor_name + = "(ES) "
}
}
I wrote the code as above, but it does not seem to be shown well as engineer sampling.
Can you tell me how to do this?
Thank you very much.

[The Coolest]

Code: Select all

if (RDMSR (0xce, &eax, &edx)) {
	if (eax & (1 << 27) != 0) {
		Processor_name += "(ES) ";
	}
}

[kouhei_nanahara]

Thanks for the reply!
It works perfectly!
Thank you so much. I would like to study the bit position of Sandy Bridge.
Thanks.

[The Coolest]

It's the same for all 1st - 3rd generation of Core processors. I don't know about newer ones.

[kouhei_nanahara]

Thank you for the information. Thank you very much!